An essential semiconductor device is semiconductor memory, such as a random access memory (RAM) device. A RAM allows a memory circuit to execute both read and write operations on its memory cells. Typical examples of RAM devices include dynamic random access memory (DRAM) and static random access memory (SRAM).
Another form of memory is the content addressable memory (CAM) device. A conventional CAM is viewed as a static storage device constructed of modified RAM cells. A CAM is a memory device that accelerates any application requiring fast searches of a database, list, or pattern, such as in database machines, image or voice recognition, or computer and communication networks. CAMs provide benefits over other memory search algorithms by simultaneously comparing the desired information (i.e., data in a comparand register) against the entire list of pre-stored entries. As a result of their unique searching algorithm, CAM devices are frequently employed in network equipment, particularly routers, gateways and switches, computer systems and other devices that require rapid content searching, such as routing data or tables for data networks or matching URLs. Some of these tables are “learned” from the data passing through the network. Other tables, however, are fixed tables that are loaded into the CAM by a system controller. These fixed tables reside in the CAM for a relatively long period of time. A word in a CAM is typically large and can be 72 bits or more.
In order to perform a memory search in the above-identified manner, CAMs are organized differently than other memory devices (e.g., DRAM and SRAM). For example, data is stored in a RAM in a particular location, called an address. During a memory access, the user supplies an address and reads from or gets back the data at the specified address. In a CAM, however, data is stored in locations in a somewhat random fashion. The memory storage locations can be selected by an address bus, or the data can be written into the first empty memory storage location. Every memory storage location stores additional information to keep track of whether the memory storage location is storing valid information or is empty and available for writing.
Once information is stored in a memory storage location, it is found by comparing every bit stored in the storage location with data in the comparand register. When the contents stored in the CAM memory storage location do not match the data in the comparand register, a local match detection circuit returns a no match indication. When the contents stored in the CAM memory storage location match the data in the comparand register, the local match detection circuit returns a match indication. If one or more local match detect circuits return a match indication, the CAM device returns a “match” indication. Otherwise, the CAM device returns a “no-match” indication. In addition, the CAM may return the identification of the address/memory storage location in which the desired data is stored or one of such addresses, such as a highest priority match address, if more than one corresponding CAM storage location contained matching data. Thus, with a CAM, the user supplies the data and gets back an address if there is a match.
For high CAM look-up throughput rates, the incoming data is compared with all CAM entries in parallel, resulting in high power consumption. In some power saving schemes, individual entries can be programmed to never match, or banks of entries can be enabled or disabled.
TCAMs (i.e., ternary CAM devices) are similar to CAMs except that each bit in a CAM entry can also be programmed to match a ‘don't care’ or X value. When an incoming TCAM data word is compared with an entry, each match bit in the entry can be programmed to be one of a (0, 1, X), where X is a ‘don't care’ match value that matches a 0 or 1 in the corresponding bit on the incoming TCAM word. Of course, all the other bits have to match according to the (0, 1, X) pattern before a TCAM word match occurs. For example, programming a TCAM entry with all X's causes the entry to match all possible inputs. If there are N bits of value X in a word, then 2N possible inputs will match that entry.
For each CAM or TCAM storage location match, time consuming electrical events occur. The first event is to precharge each match line associated with a CAM storage location to indicate a match. Then the match between the bits of the incoming word/comparand and the bits of each CAM storage location occurs. If all bits of a stored word match corresponding bits of a comparand word, then the match line remains charged. If any of the bits do not match, then the match line is pulled to ground. A match line sense amplifier senses the state of the match line. The speed of the sense amplifier is dependent upon sense speed and is a trade-off against power consumption. A number of attempts have been made to increase the speed of a match line sense amplifier.
For example, U.S. Pat. No. 6,442,090 entitled “Differential Sensing Amplifier for Content Addressable Memory” by Ahmed at al. describes a differential cross-coupled sense amplifier. FIG. 1 is an embodiment of Ahmed's cross-coupled differential sensing amplifier that requires a cascaded connection load, which varies, making sensing time selection difficult. The FIG. 1 amplifier 105 also needs to allow an extra noise margin in case of match line voltage fluctuations and an offset having a varying load.
FIG. 2 illustrates another sensing amplifier known in the art. In the FIG. 2 amplifier the current is low and semi-constant for all switching combinations. The amplifier, however, requires a control line, which further requires a shield line, each of which cause an increase in the CAM cell size. Match line power is conserved but the control line has a power loss. The current limit control also requires a band gap voltage reference control.
FIG. 3 shows a conventional current sensing amplifier having a common gate stage.